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          Vicor Power-on-Package
          Redefining 48V to PoL regulation for high-power processors and AI ASICs See it in action

          XPUに実装される電源への新しいアプローチの利点?

          Vicor Power-on-Package テクノロジーは、CPUやGPU(またはXPU)に課せられた課題を、「最後の1インチ」による外部の大電流供給によって克服することで、パフォーマンスを向上させ、マザーボードの設計を単純化するだけではありません。これにより、XPUは、人工知能などの高性能アプリケーションを実現するために必要不可能な以前はできなかった性能のレベルを達成ることができます。

          Benefits of Power-on-Package

          Benefits of Power-on-Package

          電流提供

          より高いピークおよび平均の

          50X

          Reduces motherboard copper and processor interconnect resistances by up to 50X

          10X

          XPU 電力ピン数を 10分の1以下削減

          Power-on-Package は、これまで実現できなかった何百アンペアという定格電流を
          高性能アプリケーションに提供します

          Vicor-industry-big-data-large.jpg

          大規模なデータの?マイニング

          Vicor-industry-ai-large.jpg

          人工知能

          Vicor-industry-machine-learning-large.jpg

          機械学習

          Vicor-industry-waymo-van-large.jpg

          自動運転車両

          In response to ever-increasing demands within the cloud for high-performance applications, such as big data mining and artificial intelligence with its machine learning and deep learning applications, processor operating currents have risen to many hundreds of amperes. The remaining short distance PDN to the processor – the “last inch” – consisting of the motherboard power plane and interconnects within the processor socket, has become a limiting factor in processor performance and total system efficiency.

          VicorユーザーからのGPU/CPUピーク電流要件が増大

          Vicor customer peak CPU/GPU current

          従来のPoL電圧レギュレータでは実現できなかった課題を解決

          Conventional multiphase VRs limit a high-power processor's full running potential

          Scale

          Low density prohibits close proximity to processor

          Scale

          Density challenge increases with higher currents

          imbalance

          Additional phases for higher currents creates phase imbalance

          Noise

          High switching frequency noise

          Power distribution loss from the VR to the processor, the last inch

          power loss
          Efficiency loss chart

          Vicor technology eliminates the “last inch”

          Factorized Power Architecture (FPA) replaces conventional multiphase regulators and achieves higher density and power system efficiency 

          FPA factorizes power conversion into separate regulation and transformation functions that can be individually optimized to maximize performance. The regulation module can be placed at any location on the motherboard while the critical current delivery module the current multiplier is optimized for density, efficiency and low noise and can be placed in extremely close proximity to the processor. Current multipliers are capable of delivering a high current of greater than 1000 Amps and enable a 50X reduction in PDN resistance. Depending on processor currents, Vicor offers both lateral and vertical factorized power options.

          Factorized power regulation and transformation stages

          Factorized power

          High-current multiplication next to the processor

          Factorized power to processor

          Power-on-Package solutions

          Lateral Power Delivery (LPD)

          High-current delivery is provided via MCM (Modular Current Multiplier) modules that are placed adjacent to the processor either on the motherboard or on the processor substrate. Placement of MCMs on the substrate minimizes PDN losses and reduces the number of processor substrate BGA pins required for power.

          Lateral Power Delivery
          lateral power

          Vertical Power Delivery (VPD)

          For extremely high processor currents, VPD reduces PDN resistance by a further 10X over LPD by placing the current multiplier module directly underneath the processor.  Delivering power vertically has the added advantage of opening up the topside PCB board area for high speed I/O and memory. VPD utilizes similar current multipliers to the Vicor LPD solution but integrates the high-frequency bypass capacitance typically placed beneath the processor into the gearbox package attached to the MCM. The gearbox also enables the necessary change in pitch from the MCM’s output pins to the processor’s power pins and its output power pins are also matched to the power map of the processor or ASIC to maximize performance.  

          Vertical Power Delivery
          Vicor Power-on-Package Vertical Power Delivery

          See how Gyoukou, the ExaScaler/PEZY ZettaScaler-2.2 liquid immersion cooling supercomputer leverages Power-on-Package

          コンテンツ

          Power-on-Package diagram
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          Power-on-Package について Vicor のエンジニアから 詳しく聞くには、下記のフォームに記入してください。

          Power-on-Package について Vicor のエンジニアから 詳しく聞くには、下記のフォームに記入してください。

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